AMD PALCE20V8 Manuals

AMD PALCE20V8 Family Manual

This document describes the features and characteristics of the Advanced Micro Devices PALCE20V8 Family EE CMOS 24-Pin Universal Programmable Array Logic, including pin and function compatibility with all GAL 20V8/As, electrically erasable CMOS technology, high-speed CMOS technology, direct plug-in replacement for a wide range of 24-pin PAL devices, programmable enable/disable control, individually programmable outputs as registered or combinatorial, Peripheral Component Interconnect (PCI) compliance, preloadable output registers for testability, automatic register reset on power-up, cost-effective 24-pin plastic SKINNYDIP and 28-pin PLCC packages, extensive third-party software and programmer support, fully tested for 100% programming and functional yields and high reliability, and programmable output polarity.