AMD PALCE20V8 Manuals

ManualLib has 2 documents for the AMD PALCE20V8: 1 programming manual, 1 user manual. Every file can be read online or downloaded as a PDF for free.

Programming Manual 1User Manual 1

Key facts

Brand
AMD
Model
PALCE20V8
Industry
Industrial
Documents
2
Languages
EN
Last added
2012-05-09

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AMD PALCE20V8 Family Datasheet

AMD PALCE20V8 Family Datasheet

Datasheet 17 pages · 130 KB · EN

The PALCE20V8 is an advanced, electrically‑erasable CMOS programmable array logic (PAL) device from AMD. It offers eight configurable macrocells, selectable as registered or combinatorial outputs, and supports both commercial and industrial temperature ranges. The device is pin‑compatible with GAL20V8 and can replace a wide range of 24‑pin PAL parts.

The datasheet provides detailed functional descriptions, macrocell configuration options, pin designations, package information, power‑up reset behavior, programming and erasing procedures, as well as compliance with PCI specifications. It also outlines security features such as a programmable security bit and an electronic signature word.

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AMD PALCE20V8 specifications

Propagation delay (‑5 version)5 ns
Propagation delay (‑7 version)7.5 ns
Package types24‑Pin 300 mil Plastic (SKINNYDIP) and 28‑Pin PLCC
Power‑Up Reset Time1000 ns
Operating temperature rangesCommercial 0 °C to +75 °C; Industrial –40 °C to +85 °C

Source: AMD PALCE20V8 Family Datasheet

All AMD PALCE20V8 documents by type

Datasheet 2

Ratings, dimensions and ordering codes, for selection and design work.

Questions answered in these manuals

What is the propagation delay of the PALCE20V8?

The PALCE20V8 has a 5 ns propagation delay for the “‑5” version and a 7.5 ns delay for the “‑7” version.

From: AMD PALCE20V8 Family Datasheet

What packages are offered for the PALCE20V8?

It is available in a 24‑pin 300 mil plastic SKINNYDIP package and a 28‑pin PLCC package.

From: AMD PALCE20V8 Family Datasheet

What is the propagation delay of the PALCE20V8‑5 version?

The PALCE20V8‑5 version has a 5‑ns propagation delay.

From: AMD PALCE20V8 EE CMOS 24-Pin Universal Programmable Array Logic Datasheet

How many reprogramming cycles can the PALCE20V8 endure?

The device supports up to 100 normal programming (reprogramming) cycles.

From: AMD PALCE20V8 EE CMOS 24-Pin Universal Programmable Array Logic Datasheet