The PALCE20V8 is a high-performance 24-pin programmable logic array device from AMD. It features low power consumption, high speed, and programmability.
The PALCE20V8 is an advanced programmable array logic (PAL) device built with low‑power, high‑speed electrically‑erasable CMOS technology. It offers eight configurable macrocells, selectable registered or combinatorial outputs, and full PCI compliance. The device is pin‑compatible with GAL20V8 and can replace a wide range of 24‑pin PAL parts.
The datasheet provides detailed specifications, pin‑out diagrams, ordering information, macrocell configuration options, power‑up reset behavior, endurance characteristics, and programming/erasing guidelines for designers and system integrators.
| Propagation delay (‑5 version) | 5 ns |
|---|---|
| Propagation delay (‑7 version) | 7.5 ns |
| Package types | 24‑pin SKINNYDIP, 28‑pin PLCC |
| Power‑up reset time | 1000 ns |
| Maximum reprogramming cycles | 100 cycles |
| Maximum operating temperature | 20 years (storage) / 10 years (data retention) |
The PALCE20V8‑5 version has a 5‑ns propagation delay.
The device supports up to 100 normal programming (reprogramming) cycles.
It is offered in a 24‑pin SKINNYDIP plastic package and a 28‑pin PLCC package.
The power‑up reset time is specified as 1000 ns.