The IDT23S09E is a high-speed clock buffer that operates in the range of 10MHz to 200MHz. It features an on-chip PLL lock-loop that ensures the output clock is synchronized with the input clock. The IDT23S09E has low jitter and distortion, making it ideal for high-speed clock distribution applications.
The IDT IDT23S09E is a high-speed phase-lock loop (PLL) clock buffer designed for high-speed clock distribution applications. It accepts one reference input and drives two banks of four low skew clocks, achieving zero delay by aligning the phase between incoming and output clocks within the 10 to 200MHz range.
| Operating Frequency Range | 10MHz to 200MHz |
|---|---|
| Supply Voltage | 3.3V VDD |
| Output Skew | < 250ps |
| Cycle-to-Cycle Jitter | < 200 ps |
| Power Down Current (Commercial) | < 12uA |
| Package Types | SOIC and TSSOP |
The device operates within a frequency range of 10MHz to 200MHz.
Yes, the product is designed to be spread spectrum compatible and does not filter off the feature of the reference input.
The IDT23S09E is characterized for both Industrial and Commercial operation.