IDT 70V3319/99S High-Speed 3.3V 256/128K x 18 Dual-Port Synchronous Static RAM Datasheet

DSC 5623/7 is a dual-port high-speed cache memory chip launched by Integrated Device Technology in 2003. Its features are true dual-port memory cells that allow simultaneous access to the same memory location, and support high-speed data access. The commercial frequency can reach 3.6ns (166MHz) and the industrial frequency can reach 4.2ns (133MHz)


IDT 70V3319/99S High-Speed 3.3V 256/128K x 18 Dual-Port Synchronous Static RAM Datasheet - cover page
Brand
IDT
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
23
File format
PDF
File size
348 KB
Published
14 October, 2011
Updated
30 September, 2023
MD5 checksum
C4C73C572A4A775636D85F6E12A7EAFE

About this manual

The IDT 70V3319/99S provides true dual‑port memory cells, allowing simultaneous access to the same location from both ports. It supports high‑speed data access (up to 166 MHz commercial, 133 MHz industrial) with pipelined or flow‑through output modes, counter enable, repeat features, and optional JTAG for testing. The device operates from a single 3.3 V core supply and offers selectable 3.3 V or 2.5 V I/O voltage via the OPT pins.

The part is offered in 128‑pin TQFP, 208‑pin fine‑pitch BGA, and 256‑pin BGA packages, covering commercial (0 °C to +70 °C) and industrial (‑40 °C to +85 °C) temperature ranges. Electrical specifications include a core VDD of 3.15‑3.45 V, input leakage ≤10 µA, and dynamic operating currents up to 500 mA (commercial) or 400 mA (industrial).

What's inside

  • Features
  • Pin Configuration
  • Electrical Characteristics
  • Timing Diagrams
  • Package Options
  • Operating Conditions
  • JTAG Interface
  • Ordering Information

Specifications

Core Supply Voltage (VDD)3.15 V – 3.45 V (typ 3.3 V)

Frequently asked questions

What package types are available for the 70V3319/99S?

It is offered in a 128‑pin Thin Quad Flatpack (TQFP), a 208‑pin fine‑pitch Ball Grid Array (BGA), and a 256‑pin BGA.

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