The IDT72605 and IDT72615 are high-performance, low-power bidirectional dual-port FIFO memories with a synchronous interface for fast read and write cycle times. The SyncBiFIFO™ is a data buffer that can store or retrieve information from two sources simultaneously. Two dual-port FIFO memory arrays are combined to form a single four-port FIFO, which is particularly useful for implementing high-speed bidirectional data transfer on a single chip.
The IDT72605 and IDT72615 are high‑speed, low‑power CMOS SyncBiFIFO devices offering two independent FIFO memories for fully bidirectional data transfers. Each device provides a 256 × 18 × 2 (IDT72605) or 512 × 18 × 2 (IDT72615) organization, built‑in bypass paths, programmable flag offsets, and independent clocks for each port.
The datasheet includes pin‑out diagrams for 64‑pin TQFP and 68‑pin PLCC packages, detailed pin descriptions, absolute maximum ratings, DC and AC electrical characteristics, and timing parameters such as clock frequency up to 50 MHz and cycle times from 20 ns to 50 ns. It also describes reset behavior, port‑A and port‑B control signals, and programmable flag functionality.
| Organization (IDT72605) | 256 × 18 × 2 |
|---|---|
| Organization (IDT72615) | 512 × 18 × 2 |
| Supply Voltage (VCC) | 5 V ±10 % |
| Industrial Temperature Range | -40 °C to +85 °C |
| Output Logic "1" Voltage (VOH) | 2.4 V (typ) |
| Active Power Supply Current (Icc) | 230 mA (typ) |
| Output Capacitance | 10 pF |
The devices operate from –40 °C to +85 °C.
The PLCC package has three +5 V power pins, while the TQFP package has two.
After reset, the programmable flag offsets are set to 8 words.