The FCT16823AT/BT/CT/ET and FCT162823AT/BT/CT/ET 18-bit bus interface registers are built using advanced, dual metal CMOS technology. These high-speed, low-power registers with clock enable (xCLKEN) and clear (xCLR) con- trols are ideal for parity bus interfacing in high-performance synchronous systems.
The FAST CMOS 18‑bit registers from Integrated Device Technology provide high‑speed, low‑power operation with options for 18‑bit or two 9‑bit configurations. They include clock enable, clear functions, and power‑off disable outputs for live insertion, making them suitable for high‑performance backplane and parity‑bus applications.
The document details pin configurations, absolute maximum ratings, DC electrical characteristics, output drive capabilities, power‑supply behavior, and switching timing. It also includes test circuits, waveform examples, and ordering information for various package types such as SSOP, TSSOP, TVSOP and CERPACK.
| Technology node | 0.5 µm CMOS |
|---|---|
| Commercial temperature range | -40 °C to +85 °C |
| VIH (Input HIGH level) | 2.0 V |