IDT Manuals

DSC 5623/7 is a dual-port high-speed cache memory chip launched by Integrated Device Technology in 2003. Its features are true dual-port memory cells that allow simultaneous access to the same memory location, and support high-speed data access. The commercial frequency can reach 3.6ns (166MHz) and the industrial frequency can reach 4.2ns (133MHz)

This document describes the features and characteristics of the IDT71016 product, including 64K x 16 advanced high-speed CMOS Static RAM, equal access and cycle times, one Chip Select plus one Output Enable pin, bidirectional data inputs and outputs directly TTL-compatible, low power consumption, etc.

This document describes the features and characteristics of IDT6167, including high speed, low power consumption, battery backup operation, and various packaging options.

This document is the datasheet of IDT72V223/233/243/253/263/273/283/293

32K x 16 Bank-Switchable Dual-Ported SRAM with External Bank Selects

This document introduces the IDT71V3556/58 device's product characteristics, including device type, working voltage, storage capacity, storage speed, interface type, etc.

The IDT2308A is a high-speed phase-lock loop (PLL) clock multiplier designed for high-speed clock distribution and multiplication applications. It has two banks of four outputs each that are controlled via two select addresses. By proper selection of input addresses, both banks can be put in tri-state mode. In test mode, the PLL is turned off, and the input clock directly drives the outputs for system testing.

This datasheet introduces the features and characteristics of IDT71V67603/7803 SRAM. IDT71V67603/7803 SRAM is a high-performance SRAM organized as 256K x 36, 512K x 18, supports high system speed, supports 3.3V core power supply, supports 3.3V I/O, and is packaged in a JEDEC standard 100-pin thin plastic quad flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch ball grid array (fBGA).

The FCT16823AT/BT/CT/ET and FCT162823AT/BT/CT/ET 18-bit bus interface registers are built using advanced, dual metal CMOS technology. These high-speed, low-power registers with clock enable (xCLKEN) and clear (xCLR) con- trols are ideal for parity bus interfacing in high-performance synchronous systems.

dsc-4621/2 is a high-performance high-speed bidirectional bus transceiver produced by idt company. it has a 9-bit parity checker/generator, can provide buffered direction and three-state control, error flag with open-drain output, iol = 48ma (commercial) and 32ma (military)

The IDT72605 and IDT72615 are high-performance, low-power bidirectional dual-port FIFO memories with a synchronous interface for fast read and write cycle times. The SyncBiFIFO™ is a data buffer that can store or retrieve information from two sources simultaneously. Two dual-port FIFO memory arrays are combined to form a single four-port FIFO, which is particularly useful for implementing high-speed bidirectional data transfer on a single chip.

IDT72T1845, IDT72T1855, IDT72T1865, IDT72T1875, IDT72T1885, IDT72T1895, IDT72T18105, IDT72T18115, IDT72T18125 are a series of high-performance synchronous FIFO chips with a working voltage of 2.5V. They can be selected for HSTL/LVTTL input and output, and support a 225MHz operating frequency.

This document is the user manual of IDT54/74FCT821A/B/C,IDT54/74FCT823A/B/C,IDT54/74FCT824A/B/C,IDT54/74FCT825A/B/C products

IDT49FCT805BT/CT is a high-speed CMOS buffer/clock driver with extremely low output distortion, low power, high drive capability and high reliability.

This document is the IDT7203/7204/7205/7206 product manual, which introduces its features and characteristics, including memory organization, access time, power consumption, read and write methods, etc.