The IDT23S09 is a high-speed phase-lock loop (PLL) clock buffer designed for high-speed clock distribution applications. It achieves zero delay and operates within the range of 10 to 133MHz. The IDT23S09 accepts one reference input and drives two banks of four low skew clocks. The -1H version of this device has higher drive capability at 133MHz frequency.
The IDT IDT23S09 is a high-speed phase-lock loop (PLL) clock buffer designed for high-speed clock distribution applications. It accepts one reference input and drives two banks of four low skew outputs, achieving zero delay by aligning the phase between incoming and output clocks within the range of 10 to 133MHz.
| Operating Frequency Range | 10MHz to 133MHz |
|---|---|
| Supply Voltage | 3.3V VDD |
| Output Skew | < 250ps |
| Cycle-to-Cycle Jitter | < 200 ps |
| Operating Temperature (Industrial) | -40 to +85 °C |
The device operates at frequencies up to 133MHz.
No, it does not require any external RC network.