IDT2308 is a 3.3V zero delay clock multiplier that can be used for applications with frequencies ranging from 10MHz to 133MHz. The IDT2308 distributes one clock input to two four-output arrays and provides independent output enable for each output array. The external feedback (FBK) pin is used to synchronize the outputs to the clock input. The output skew is less than 200 ps and the cycle-to-cycle jitter is less than 200 ps. IDT2308 provides 1x, 2x, 4x output options, which can be selected according to needs. IDT2308 does not require an external RC network, operates at 3.3V, and is available in TSSOP and SOIC packages.
The IDT2308 is a high-speed phase-lock loop (PLL) clock multiplier designed for high-speed clock distribution and multiplication applications. It operates within a frequency range of 10 to 133MHz and provides two banks of four outputs each, controlled via select addresses. The device achieves zero delay by aligning the phase between the incoming clock and the output clock.
| Operating Frequency Range | 10MHz to 133MHz |
|---|---|
| Supply Voltage | 3.3V |
| Output Skew | <200 ps |
| Jitter (Cycle-to-Cycle) | <200 ps |
| Power Down Current | <25 µA |
The device offers 1x, 2x, and 4x output options depending on the specific configuration selected.
No, the device does not require an external RC network.