Hitachi HD74ALVCH16831 1-to 4 Address Register Driver with 3-state Outputs Datasheet

The HD74ALVCH16831 is a 1-to-4 address register/driver designed for operation with a VCC range of 2.3V to 3.6V. It is suitable for applications where a single address bus drives four separate memory locations. The HD74ALVCH16831 can function as either a buffer or a register, depending on the logic level of the select (SEL) input. In buffer mode (SEL logic high), the outputs mirror the inputs and are controlled by two output enable (OE) controls. Each OE control operates two groups of nine outputs. In register mode (SEL logic low), the device operates as an edge-triggered D-type flip flop. On the positive transition of the clock (CLK) input, data set up at the A inputs is stored in internal registers. The OE controls function the same way as in buffer mode. When OE is logic low, the outputs are in a normal logic state (either high or low logic level). When OE is logic high, the outputs enter a high impedance state. To ensure the high impedance state during power up or power down, OE should be pulled up to VCC using a pullup resistor, with the minimum value determined by the driver's current sinking capability. SEL and OE do not affect the internal operation of the flip flops, allowing for retention of old data or entry of new data while the outputs are in the high impedance state.

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