The BS62LV4006 is a high performance, low power CMOS static random access memory organized as 524,288 words by 8 bits and operates from a wide range of 2.4V to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 0.45uA at 3.0V/25oC and maximum access time of 55ns at 3.0V/85oC. Easy memory expansion is provided by an active LOW chip enable (CE) , and active LOW output enable (OE) and three-state output drivers. The BS62LV4006 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS62LV4006 is available in the JEDEC standard 32L SOP, TSOP , PDIP, TSOP II and STSOP package.
The document describes the BS62LV4006, a high-performance Static Random Access Memory (SRAM) organized as 524,288 words by 8 bits. It features automatic power-down when deselected and fully static operation with three-state outputs compatible with TTL logic levels.
Key specifications include a wide operating voltage range of 2.4V to 5.5V and very low power consumption, with typical CMOS standby currents of 0.45uA at 3.0V. The device supports both commercial (-40°C to +70°C) and industrial (-40°C to +85°C) temperature ranges.
| Memory Organization | 524,288 words x 8 bits |
|---|---|
| Operating Voltage Range | 2.4V ~ 5.5V |
| Typical Standby Current (3.0V) | 0.45uA |
| Maximum Access Time (3.0V) | 55ns |
| Power Dissipation | 1.0 W |
The device maintains data with a supply voltage as low as 1.5V.
The output enable input is active LOW.