The SY10/100E111AE/LE are low skew 1-to-9 differential drivers designed for clock distribution in mind. The SY10/ 100E111AE/LE's function and performance are similar to the popular SY10/100E111, with the improvement of lower jitter and the added feature of low voltage operation. It accepts one signal input, which can be either differential or single-ended if the VBB output is used. The signal is fanned out to 9 identical differential outputs. An enable input is also provided such that a logic HIGH disables the device by forcing all Q outputs LOW and all Q outputs HIGH. The E111AE/LE is specifically designed, modeled and produced with low skew as the key goal. Optimal design and layout serve to minimize gate to gate skew within a device, and empirical modeling is used to determine process control limits that ensure consistent tpd distributions from lot to lot. The net result is a dependable, guaranteed low skew device. To ensure that the tight skew specification is met it is necessary that both sides of the differential output a
The SY10E111AE/LE and SY100E111AE/LE are low‑skew 1‑to‑9 differential clock drivers designed for high‑performance clock distribution. They operate from 5 V or 3.3 V supplies, offer enable control, and provide voltage‑ and temperature‑compensated outputs.
The document lists detailed electrical parameters (output high/low voltages, propagation delays, skew, input currents), pin configurations, package dimensions, and commercial/industrial ordering codes for both the 5 V and 3.3 V versions.
| Power‑supply range (5 V version) | 4.2 V to 5.5 V |
|---|---|
| Power‑supply range (3.3 V version) | 3.0 V to 3.8 V |
| Typical output HIGH voltage (5 V, SY10E111AE) | ≈ 3.92 V |
| Typical output LOW voltage (5 V, SY10E111AE) | ≈ 3.05 V |
| Within‑device skew | ≤ 75 ps |
| Propagation delay (differential, 5 V) | 380 ps to 680 ps |
Typical differential propagation delay ranges from about 380 ps to 680 ps depending on the device and voltage.
The within‑device skew is specified as up to 75 ps.