MICREL SY10E143 SY100E143 handbook

Update: 28 September, 2023

The document describes the features and characteristics of the SY10/100E143 high-speed 9-bit hold register, designed for use in new, high-performance ECL systems. It features parallel input data interface, mode selection, clock inputs, master reset function, etc. The product is suitable for high-speed registers, pipeline registers, synchronous operation, and byte-wide parity applications.

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File format: PDF

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MD5 Checksum: 05A5707F22635C88317B841885E86C2C

Publication date: 09 May, 2012

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PDF Link: MICREL SY10E143 SY100E143 handbook PDF