AD9514 is a 1.6GHz clock distribution IC with dividers, delay adjust and three outputs. Its features include 1.6GHz differential clock input, 3 programmable dividers, divide-by in range from 1 to 32, phase select for coarse delay adjust, 2 independent 1.6GHz LVPECL clock outputs, 225 fs rms of additive broadband output jitter, 1 independent 800MHz/250MHz LVDS/CMOS clock output, 300 fs rms/290 fs rms of additive broadband output jitter, time delays up to 10ns, 4-level logic pin configuration, space-saving, 32-lead LFCSP package.
The AD9514 clock distribution IC provides three independent outputs—two LVPECL outputs up to 1.6 GHz and one LVDS/CMOS output up to 800 MHz (LVDS) or 250 MHz (CMOS). Each output features a programmable divider (1‑32) and selectable coarse delay adjustments, delivering sub‑picosecond jitter for high‑performance data converters and wireless transceivers.
The device operates from a single 3.3 V supply, works over –40 °C to +85 °C, and is offered in a space‑saving 32‑lead LFCSP package. Detailed specifications, timing characteristics, and phase‑noise performance are provided in the following sections.
| Maximum Clock Input Frequency | 1.6 GHz |
|---|---|
| Input Sensitivity (single‑ended) | 150 mV p‑p |
| LVPECL Output Additive Time Jitter | 225 fs rms |
| LVDS Output Additive Time Jitter | 300 fs rms |
| Supply Voltage | 3.3 V |
| Operating Temperature Range | –40 °C to +85 °C |
| Package | 32‑lead LFCSP |
The AD9514 accepts clock inputs up to 1.6 GHz.
It provides three independent clock outputs: two LVPECL and one LVDS/CMOS.
The LVDS/CMOS output offers three full‑scale delay values—1.5 ns, 5 ns, and 10 ns—each with 16 steps of fine adjustment.
The LVPECL outputs have additive broadband jitter of 225 fs rms.