Analog Devices AD9516-1 Clock Generator Handbook

AD9516-1 is a 14-output clock generator with integrated 2.5 GHz VCO, the output clock frequency range is from 1.6 GHz to 800 MHz. This device has low phase noise, programmable delay, digital or analog lock detection and other features.


Analog Devices AD9516-1 Clock Generator Handbook - cover page
Brand
Analog Devices
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
84
File format
PDF
File size
1.7 MB
Published
24 March, 2012
Updated
30 September, 2023
MD5 checksum
9DC70B7A3CA67E32E9185F3A7D721443

About this manual

The AD9516-1 is a 14‑output clock generator IC that integrates a PLL and a VCO tunable from 2.30 GHz to 2.65 GHz. It can also accept an external VCO/VCXO up to 2.4 GHz. The device is intended for low‑jitter, low‑phase‑noise clock distribution in high‑speed data converters, wireless transceivers, instrumentation, and broadband infrastructure.

Key features include three pairs of LVPECL outputs (up to 2.95 GHz), two pairs of LVDS outputs (up to 800 MHz), eight CMOS outputs (up to 250 MHz), programmable delay and division, additive output jitter as low as 225 fs rms, and a 64‑lead LFCSP package powered from a single 3.3 V supply. The datasheet provides detailed specifications, pin descriptions, timing diagrams, and serial control port information.

What's inside

  • Features
  • Applications
  • General Description
  • Functional Block Diagram
  • Specifications
  • Power Supply Requirements
  • PLL Characteristics
  • Clock Inputs
  • Clock Outputs
  • Timing Characteristics

Specifications

LVPECL output maximum frequency2950 MHz
LVDS output maximum frequency800 MHz
CMOS output maximum frequency250 MHz
Phase noise @ 100 kHz offset (typical)-105 dBc/Hz
Operating temperature range-40 °C to +85 °C
Typical supply voltage (Vs)3.3 V (+5 %)
Additive output jitter (LVPECL)225 fs rms

Frequently asked questions

What is the maximum frequency of the LVPECL outputs?

The LVPECL outputs can operate up to 2.95 GHz.

How many LVDS output pairs does the AD9516-1 provide?

It provides two pairs of LVDS clock outputs, for a total of four LVDS signals.

What is the typical phase‑noise performance at 100 kHz offset?

Typical phase noise is –105 dBc/Hz at a 100 kHz offset.

What supply voltage does the device require?

The AD9516‑1 operates from a 3.3 V supply (±5 % tolerance) and a VCP up to 5.25 V for the external VCO.

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