SP605 Hardware User Guide
The Xilinx SP605 User Guide provides detailed information about the SP605 evaluation board, which is built around a Spartan‑6 XC6SLX45T‑3FGG484 FPGA. It describes the board's hardware components, including DDR3 memory, flash devices, connectors, and peripheral interfaces, and explains how to use the provided reference designs and resources.
The guide also includes appendices with default jumper and switch settings, pin‑out tables for the VITA‑57.1 FMC LPC connector, the master UCF file, and a list of additional documentation and support links for further development with Spartan‑6 devices.
| FPGA | Spartan‑6 XC6SLX45T‑3FGG484 |
|---|---|
| DDR3 Memory | 128 Mbit DDR3 component memory |
| CompactFlash Connector | System ACE CF and CompactFlash connector |
| USB JTAG Interface | USB JTAG |
| Clock Generator | 200 MHz differential oscillator |
| Multi‑Gigabit Transceiver | GTP MGT |
| USB‑UART Bridge | USB‑UART bridge |
| DVI Codec | DVI CODEC |
The board uses a Spartan‑6 XC6SLX45T‑3FGG484 FPGA.
It includes a 128 Mbit DDR3 component memory.
The board features System ACE CF/CompactFlash, USB JTAG, PCIe, SFP module, SMA connectors, and a 10/100/1000 Ethernet PHY among others.