This document is the Spartan-6 FPGA configuration user guide of Xilinx company, which mainly introduces the configuration method and configuration process of FPGA.
This guide provides detailed information on configuring Xilinx Spartan‑6 FPGAs. It covers configuration overview, design considerations, supported configuration sources, and power‑up sequencing. The document also describes the various configuration interfaces such as JTAG, SelectMAP, SPI, and BPI, and includes notes on voltage levels, pull‑up resistor values, and pin functions.
The later chapters address advanced topics like multi‑boot, bitstream encryption, readback verification, and troubleshooting. Revision history notes show updates to commands (e.g., REBOOT replaced by IPROG) and hardware details such as resistor values and added pins (VFS, VBATT, SUSPEND). The guide is intended for designers and engineers implementing Spartan‑6 configuration in their systems.
| Configuration data size for XC6SLX16 | 3.6 Mb |
|---|---|
| Pull‑up resistor between DONE and VCCO_2 | 330 Ω |
| VCCO_2 voltage level | 3.3 V |
The IPROG command replaces the REBOOT command.
The configuration data size for XC6SLX16 is 3.6 Mb.