The document is the SP601 Hardware User Guide, which provides instructions and features of the SP601 hardware.
This guide describes the SP601 evaluation board, which features a Spartan‑6 XC6SLX16‑2CSG324 FPGA, 128 MB DDR2 component memory, SPI flash, Ethernet PHY, IIC bus, NV memory and a VITA 57.1 FMC‑LPC expansion connector. It includes board diagrams, detailed component descriptions, and configuration options for power management and clock generation.
Additional sections provide default jumper and switch settings, the FMC‑LPC connector pinout, the master UCF file, reference documents, and regulatory compliance information. Links to related Xilinx documentation, support resources, and downloadable design files are also included.
| FPGA | Spartan‑6 XC6SLX16‑2CSG324 |
|---|---|
| DDR2 Memory | 128 MB DDR2 Component Memory |
| Flash Memory | SPI x4 Flash |
| Ethernet PHY | 10/100/1000 Tri‑Speed Ethernet PHY |
| IIC Bus | IIC Bus |
| NV Memory | 8 Kb NV memory |
The board uses a Spartan‑6 XC6SLX16‑2CSG324 FPGA.
It includes 128 MB of DDR2 component memory.
The board provides a 10/100/1000 Mbps tri‑speed Ethernet PHY.
The pinout is detailed in Appendix B of the guide.