The XC95216 is a high-performance CPLD from Altera that provides advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of twelve 36V18 Function Blocks, providing 4,800 usable gates with propagation delays of 10 ns.
This handbook describes the Xilinx XC95216 complex programmable logic device (CPLD). It outlines the architecture, in‑system programming capabilities, and the range of packages (160‑pin PQFP, 208‑pin HQFP, 352‑pin BGA) available for the device.
Key sections include detailed feature lists, absolute maximum ratings, recommended operating conditions, DC/AC characteristics, internal timing parameters, pin‑out tables, JTAG and power pin definitions, and ordering information. The document is intended for designers and engineers who need to integrate the XC95216 into their systems and understand its electrical and timing behavior.
| Pin‑to‑pin logic delay | 10 ns |
|---|---|
| Number of macrocells | 216 |
| Usable gates | 4800 |
| User I/O pins | Up to 166 |
| In‑system programming voltage | 5 V |
| Program/erase endurance | 10,000 cycles |
| Output drive capability | 24 mA |
| I/O voltage options | 3.3 V or 5 V |
| Operating temperature range | -65 °C to +150 °C |
| VCCIO supply voltage (5 V operation) | 4.75 V to 5.25 V |
| VCCIO supply voltage (3.3 V operation) | 3.0 V to 3.6 V |
The device supports up to 10,000 program/erase cycles.
The pin‑to‑pin logic delay is 10 ns.