The PI6C2409 is a PLL based, zero-delay buffer, with the ability to distribute nine outputs of up to 133MHz at 3.3V. All the outputs are distributed from a single clock input CLKIN and output OUT0 performs zero delay by connecting a feedback to PLL. PI6C2409 has two banks of four outputs that can be controlled by the selection inputs, SEL1 & SEL2. It also has a powersparing feature: when input SEL1 is 0 and SEL2 is 1, PLL is turned off and all outputs are referenced from CLKIN. PI6C2409 is available in high drive and industrial environment versions. An internal feedback on OUT0 is used to synchronize the outputs to the input; the relationship between loading of this signal and the outputs determines the input-output delay. PI6C2409 are characterized for both commercial and industrial operation.
The document describes the PI6C2409, a PLL-based zero-delay clock buffer designed to distribute nine outputs of up to 133 MHz at 3.3V. The device features two banks of four outputs controlled by selection inputs (SEL1 & SEL2) and includes an internal feedback loop on OUTO for synchronization.
The datasheet provides comprehensive electrical characteristics for both commercial and industrial temperature ranges, including input/output voltage levels, supply current, propagation delay, skew, jitter, and lock time. It also details mechanical packaging dimensions for 16-pin SOIC and TSSOP packages.
| Maximum rated frequency | 133 MHz |
|---|---|
| Supply Voltage | 3.3V |
| Input to output delay | less than 200ps |
| Operating Temperature (Commercial) | 0 to 70 °C |
| Operating Temperature (Industrial) | -40 to 85 °C |
The device supports a maximum rated frequency of 133 MHz.
The input to output delay is less than 200ps.