Pericom PI6C2502A Phase-Locked Loop Clock Driver Datasheet

The document describes the features and characteristics of the products.


Pericom PI6C2502A Phase-Locked Loop Clock Driver Datasheet - cover page
Brand
Pericom
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
4
File format
PDF
File size
275 KB
Published
07 August, 2012
Updated
29 September, 2023
MD5 checksum
6BAC274103C9F0BB7776940760008E4E

About this manual

The document describes the Pericom PI6C2502A, a Phase-Locked Loop (PLL) clock driver designed for networking, server, workstation, and PC applications. It features synchronous DRAM module compatibility and allows for spread spectrum modulation on the clock input to reduce EMI.

What's inside

  • Product Features
  • Application
  • Logic Block Diagram
  • Pin Functions
  • DC Specifications
  • Recommended Operating Conditions
  • Electrical Characteristics
  • AC Specifications
  • Switching Characteristics
  • Package Mechanical Information

Specifications

Clock Frequency Range80 to 134 MHz
Supply Voltage3.3V
Package TypePlastic 8-pin SOIC Package (W)
Cycle-to-Cycle Jitter Max+75ps
Operating Temperature Range0 to 70 °C

Frequently asked questions

What is the maximum cycle-to-cycle jitter?

The maximum cycle-to-cycle jitter is +75ps.

Can the clock input use spread spectrum modulation?

Yes, the CLK_IN allows for spread spectrum clock input to reduce EMI.

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