Pericom PI6C2516 Phase-Locked Loop Clock Driver Datasheet

This file is a pdf file. The content is a data manual for a certain type of RF module. It introduces the function, parameters, and usage of the module.


Pericom PI6C2516 Phase-Locked Loop Clock Driver Datasheet - cover page
Brand
Pericom
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
7
File format
PDF
File size
299 KB
Published
07 August, 2012
Updated
30 September, 2023
MD5 checksum
EFCE075B3139D4C45D6B382A5042B01F

About this manual

The Pericom PI6C2516 is a low-skew, low-jitter phase-locked loop (PLL) clock driver designed for synchronous DRAM, server, and networking applications. It distributes a single clock input to four banks of four outputs, allowing for zero input-to-output delay when the feedback loop is connected. The device supports spread spectrum modulation on the clock input for EMI reduction and operates at a maximum clock frequency of 150 MHz.

What's inside

  • Product Features
  • Pin Description
  • Pin Functions
  • Absolute Maximum Ratings
  • Recommended Operating Conditions
  • Function Table
  • Electrical Characteristics
  • Timing Requirements
  • Switching Characteristics
  • Ordering Information

Specifications

Maximum clock frequency150 MHz
Operating temperature0 to 70 °C
Output current (High)-12 mA

Frequently asked questions

How many clock outputs does the PI6C2516 provide?

The device provides 16 clock outputs, distributed as four banks of four outputs each.

Can the PI6C2516 support spread spectrum modulation?

Yes, the CLK input allows spread spectrum modulation for EMI reduction, and the outputs track this modulation.

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