Pericom PI6C2504A Phase-Locked Loop Clock Driver Datasheet

This datasheet lists the pin functions and pinout of the PS8501.


Pericom PI6C2504A Phase-Locked Loop Clock Driver Datasheet - cover page
Brand
Pericom
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
4
File format
PDF
File size
293 KB
Published
07 August, 2012
Updated
30 September, 2023
MD5 checksum
BAA31E68363DF0E5F97EFE1D4515F44C

About this manual

The Pericom PI6C2504A is a high-performance Phase-Locked-Loop (PLL) clock driver designed for networking, Registered DIMM Synchronous DRAM modules, and server/workstation/PC applications. It features a low-skew, low-jitter design with a maximum cycle-to-cycle jitter of 75ps and allows for spread spectrum modulation on the clock input to reduce EMI.

The device operates at a 3.3V supply voltage and supports a wide range of clock frequencies from 80 to 134 MHz. It is packaged in a 16-pin QSOP package and includes on-chip series damping resistors at the clock outputs to minimize noise and EMI.

What's inside

  • Product Features
  • Product Description
  • Pin Functions
  • DC Specifications
  • Electrical Characteristics
  • AC Specifications
  • Switching Characteristics
  • Package Mechanical Information
  • Ordering Information

Specifications

Clock Frequency80 to 134 MHz
Operating Temperature0 to 70 °C
Package Type16-pin QSOP
Cycle-to-Cycle Jitter75ps max
Max Power Dissipation1.0 W

Frequently asked questions

What is the maximum cycle-to-cycle jitter of the PI6C2504A?

The maximum cycle-to-cycle jitter is 75ps.

Does the PI6C2504A support spread spectrum modulation?

Yes, the CLK_IN allows spread spectrum clock input for EMI reduction.

What is the stabilization time after power up?

The stabilization time after power up is 1 ms.

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