This datasheet introduces the ISSI IS41C16100 and IS41LV16100, which are 1,048,576 x 16-bit high-performance CMOS dynamic random access memories. They offer an accelerated cycle access mode called EDO Page Mode. EDO Page Mode allows 1,024 random accesses within a single row with access cycle time as short as 20 ns per 16-bit word. The upper and lower byte byte write control makes the IS41C16100 ideal for use in 16-bit and 32-bit wide data bus systems. These features make the IS41C16100 and IS41LV16100 ideally suited for high-performance, high-bandwidth, high data throughput applications.
The ISSI IS41C16100 and IS41LV16100 are 1,048,576 x 16-bit high-performance CMOS Dynamic Random Access Memories (DRAMs). These devices feature an accelerated cycle access called EDO Page Mode, allowing 1,024 random accesses within a single row with access cycle times as short as 20 ns per 16-bit word. They support TTL compatible inputs and outputs, tristate I/O, and various refresh modes including Auto, RAS-Only, CAS-before-RAS (CBR), and Hidden refresh.
| Memory Capacity | 1,048,576 x 16-bit |
|---|---|
| Access Cycle Time | 20 ns |
| Supply Voltage (IS41C16100) | 5V ± 10% |
| Operating Temperature (Industrial) | -40°C to 85°C |
| Package Type | 42-pin SOJ and 400-mil 50- (44-) pin TSOP (Type II) |
The maximum RAS Access Time (t RAC) is 60 ns for the 5V version and 50 ns for the 3.3V version.
1,024 refresh cycles are required in each 16 ms period.
Yes, byte write and byte read operations are achieved via two CAS signals (LCAS and UCAS).