ISSI IS41C16257A/IS41LV16257A 256K x 16 CMOS DRAM Datasheet

This document describes the features and characteristics of ISSI's IS41C16257A and IS41LV16257A high-performance CMOS dynamic random access memories, including fast access and cycle time, TTL compatible inputs and outputs, refresh interval and mode, JEDEC standard pinout, and single power supply.


ISSI IS41C16257A/IS41LV16257A 256K x 16 CMOS DRAM Datasheet - cover page
Brand
ISSI
Category
Memory
Document type
Datasheet
Language
English
Pages
20
File format
PDF
File size
130 KB
Published
02 August, 2012
Updated
28 September, 2023
MD5 checksum
3C26FD36EDCF324B9EA6EE0F53D84762

About this manual

The ISSI IS41C16257A and IS41LV16257A are 262,144 x 16-bit high-performance CMOS Dynamic Random Access Memories. These devices support Fast Page Mode allowing up to 512 random accesses within a single row with access cycle times as short as 12 ns per 16-bit word.

What's inside

  • Features
  • Description
  • Functional Block Diagram
  • Pin Descriptions
  • Truth Table
  • Functional Description
  • Absolute Maximum Ratings
  • Recommended Operating Conditions
  • Capacitance
  • Electrical Characteristics

Specifications

Memory Capacity262,144 x 16-bit (4-MBIT)
Refresh Interval512 cycles/8 ms
Max. RAS Access Time (tRAC)60 ns (-35°C), 110 ns (-60°C)
Min. Fast Page Mode Cycle Time (tPC)25 ns (-35°C), 42.5 ns (-60°C)
Supply Voltage5V ± 10% or 3.3V ± 10%
Operating Temperature0 to +70 °C

Frequently asked questions

How many refresh cycles are required per period?

To retain data, 512 refresh cycles are required in each 8 ms period.

What is the minimum pause required after power-on?

An initial pause of 200 µs is required followed by a minimum of eight initialization cycles before proper device operation.

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