The CDC5806 is a clock generator for digital TV applications. It synthesizes video clocks, audio clocks, CPU clock, ASIC clock, USB clock, and memory card clock from a 54-MHz system clock. It utilizes three phase-locked loops (PLLs) to generate different frequencies, and it features high performance, low jitter, and low peak-to-peak clock jitter.
The CDC5806 is a high-performance clock generator designed for digital television applications with a memory card interface. It synthesizes video, audio, CPU, ASIC, USB, and memory card clocks from a single 54-MHz input clock using three integrated phase-locked loops (PLLs). The device eliminates the need for external loop filter components and operates from a single 3.3-V supply voltage.
| Supply Voltage | 3.3 V |
|---|---|
| Operating Temperature Range | -40°C to 85°C |
| Input Clock Frequency | 54 MHz |
| VIDCLK Output Frequency | 74.175824 MHz or 54 MHz |
| AUDCLK Output Frequency | 16.9344 MHz or 12.288 MHz |
| CPUCLK Output Frequency | 64 MHz |
| USBCLK Output Frequency | 48 MHz |
| MCCLK Output Frequencies | 38.4 MHz, 19.2 MHz, or 12 MHz |
| Peak-to-Peak Jitter | 150 ps Max |
| Package Type | TSSOP (PW) 20-Pin |
The device requires a 54-MHz input clock to generate multiple output frequencies.
No, the PLL loop filter components are integrated on the chip.
The maximum peak-to-peak period jitter is 150 ps.