FDV302P is a P-channel logic level enhancement mode field effect transistor produced by Fairchild. It features low operating voltage and low RDS(ON), making it ideal for low voltage applications.
The document describes the Fairchild FDV302P, a P-channel DMOS FET designed for low voltage applications as a replacement for digital transistors. It utilizes high cell density technology to minimize on-state resistance and features a gate-source Zener diode for ESD ruggedness.
Key specifications include a continuous drain current of -0.12 A (peak 0.5 A) and an operating temperature range from -55°C to 150°C. The device is available in a compact SOT-23 surface mount package.
| Drain-Source Voltage (Vss) | -25 V |
|---|---|
| Gate-Source Voltage (Vgs) | 8 V |
| Drain Current - Continuous | -0.12 A |
| Maximum Power Dissipation | 0.35 W |
| Operating Temperature Range | -55 to 150 °C |
| ESD Rating (Human Body Model) | >6kV |
It is designed for low voltage applications as a replacement for digital transistors.
No, since bias resistors are not required, one P-channel FET can replace several digital transistors.