This data sheet provides a detailed description of the features and characteristics of the 82C37A CMOS high performance programmable DMA controller. The controller is compatible with the NMOS 8237A and features four independent maskable channels with autoinitial- ization capability. It is also cascadable to any number of channels and supports high speed data transfers of up to 4MBytes/sec with an 8MHz clock and up to 6.25MBytes/sec with a 12.5MHz clock. The controller also supports memory-to-memory transfers and is designed using a static CMOS process that allows for low power operation (ICCSB = 10µA maximum, ICCOP = 2mA/MHz maximum). The controller is fully compatible with TTL and CMOS and internal registers may be read from software.
The Intersil 82C37A is an enhanced version of the industry standard 8237A Direct Memory Access (DMA) controller, fabricated using Intersil's advanced 2 micron CMOS process. It is pin compatible with NMOS designs and offers increased functionality, improved performance, and dramatically reduced power consumption compared to its predecessor.
The controller allows external devices to transfer data directly to or from system memory and supports memory-to-memory transfers. It is designed to be used with an external address latch, such as the 82C82, and is compatible with industry standard microprocessors including the 8086, 80286, and Z80. The device supports three basic types of DMA services and allows reconfiguration under program control.
| Compatible with | NMOS 8237A |
|---|---|
| Maximum Supply Current (Standby) | 104A |
| Maximum Supply Current (Operating) | 2mA/MHz |
| Maximum Data Transfer Rate (8MHz) | 4MBytes/sec |
| Maximum Data Transfer Rate (12.5MHz) | 6.25MBytes/sec |
| Process Technology | 2 micron CMOS |
| Address Range per Channel | 64K |
The controller supports transfers up to 4MBytes/sec with an 8MHz clock or up to 6.25MBytes/sec with a 12.5MHz clock.
The maximum ICCSB current rating is 104A.