The document describes the features and characteristics of a high-density programmable logic product, including the number of PLD Gates, I/O Pins, Registers, maximum operating frequency, and input/output compatibility.
The ispLSI and pLSI 1032E are high‑density programmable logic devices offering 6000 PLD gates, 64 I/O pins, eight dedicated inputs, and 192 registers. They feature 5‑V in‑system programmability, non‑volatile re‑programmability, and a global routing pool for flexible interconnectivity.
The document provides detailed electrical specifications, absolute maximum ratings, timing parameters, power consumption curves, and pin descriptions. It also outlines development tools and added features such as in‑system programming and diagnostic capabilities.
| PLD Gates | 6000 |
|---|---|
| I/O Pins | 64 |
| Dedicated Input Pins | 8 |
| Registers | 192 |
| Maximum Operating Frequency (fmax) | 125 MHz |
| Propagation Delay (tpd) | 7.5 ns |
| Supply Voltage (VCC) Range | 4.5 V – 5.5 V |
| Output Drive Capability | Source 4 mA, Sink 8 mA |
The device can operate up to 125 MHz.
It provides 64 universal I/O pins.
The recommended supply voltage is between 4.5 V and 5.5 V.
The device contains 192 registers.