This document describes the features and characteristics of Lattice Semiconductor Corp.'s ispMACH 4000V/B/C/Z family of products, including high performance, ease of design, low power, and broad device offering.
The Lattice ispMACH 4000 family offers a SuperFAST CPLD solution combining high performance with low power in a flexible architecture. It blends features from the ispLSI 2000 and ispMACH 4A families to provide excellent First-Time-Fit, timing predictability, and density migration capabilities.
| Propagation delay (tpp) | 2.5ns |
|---|---|
| Global clock pins | Up to four |
| Product terms per output | 80 PTs |
| Input logic blocks | 36 input |
| Static current (ispMACH 4032Z) | 10uA |
| Static current (ispMACH 4000C) | 1.8mA |
| Supply voltages | 3.3V/2.5V/1.8V |
| Input tolerance | 5V tolerant |
The family supports operation with 3.3V, 2.5V, or 1.8V supplies.
Yes, it features 5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI interfaces.
There are up to four global clock pins with programmable clock polarity control.