ispLSI 2032E is a high-density, fast, easy-to-use, in-system programmable PLD with 1000 PLD gates, 32 I/O pins, two dedicated inputs, 32 registers, high-speed global interconnect, wide input gating for fast counters, state machines, address decoders, etc.
The Lattice ispLSI 2032E is a high‑density, in‑system programmable logic device featuring 1000 PLD gates, 32 I/O pins, and 32 registers. It supports both 3.3 V and 5 V I/O (48‑pin package) and offers programmable open‑drain outputs, global routing pools, and flexible pin placement.
The datasheet provides absolute maximum ratings, recommended operating conditions, timing parameters, pin‑out diagrams, and ordering information for various package options such as 44‑pin PLCC and 48‑pin TQFP.
| Maximum Operating Frequency (fmax) | 225 MHz |
|---|---|
| Propagation Delay (tpd) | 3.5 ns |
| Input Low Voltage (VIL) | 0 V – 0.8 V |
| Input High Voltage (VIH) | 2.0 V |
| Erase/Reprogram Cycles | 10,000 cycles |
| I/O Pins | 32 |
The device can operate up to 225 MHz.
The typical propagation delay is 3.5 ns.
It provides 32 universal I/O pins.