The SY10/100E171 is a 3-bit 4:1 multiplexer designed for use in new, high-performance ECL systems. It features differential outputs, split select architecture, and full compatibility with industry standard 10KH, 100K ECL levels.
The SY10E171 and SY100E171 are 3‑bit, 4:1 multiplexers offered in a 28‑pin PLCC package. They feature a split‑select architecture with separate SEL1A/SEL1B and SEL2 control inputs, and are compatible with standard 10 kΩ ECL levels. The device operates with a VEE range of –4.2 V to –5.5 V and provides both true and inverted outputs.
The datasheet includes pin configuration diagrams, truth tables, DC and AC electrical characteristics, propagation delays, rise/fall times, and ordering codes. Mechanical dimensions are given in inches, and the document notes that package dimensions may vary slightly due to molding tolerances.
| Package | 28‑pin PLCC |
|---|---|
| Rise/Fall Time (typical) | 300 ps |
Both devices are supplied in a 28‑pin PLCC package.