SY10/100E212 are scannable registered ECL drivers typically used as fan-out memory address drivers for ECL cache driving. They feature an extended VEE range, a maximum CLK to Output delay of 1025ps, dual differential outputs, and are fully compatible with industry standard 10KH, 100K ECL levels and Motorola MC10E/100E212.
The SY10E212 and SY100E212 are scannable registered ECL drivers used as fan‑out memory address drivers in VLSI CPU designs. They offer a 3‑bit register with dual differential outputs, master reset and internal pull‑down resistors.
The document includes a features description, pin configuration and naming, truth tables, DC and AC electrical characteristics, package dimensions, and ordering codes, allowing designers to integrate the devices into their circuits.
| VEE voltage range | -4.2V to -5.5V |
|---|---|
| Clock‑to‑Output propagation delay | 1025 ps max |
| Outputs | Dual differential |
| Input pull‑down resistor | 75 kΩ |
| Package | 28‑pin PLCC |
| Compatibility | Motorola MC10E/100E212 |
The VEE voltage range is -4.2 V to -5.5 V.
It is offered in a 28‑pin PLCC package.
The device has 28 pins.
It is fully compatible with the Motorola MC10E/100E212 driver.