The SY10/100E431 are 3-bit flip-flops with differential clock, data input and data output. The asynchronous Set and Reset controls are edge- triggered rather than level controlled. This allows the user to rapidly set or reset the flip-flop and then continue clocking at the next clock edge without the necessity of de-asserting the set/reset signal (as would be the case with a level controlled set/reset). The E431 is also designed with larger internal swings, an approach intended to minimize the time spent crossing the threshold region and thus reduces the metastability susceptibility window.
The SY10E431 and SY100E431 are 3‑bit differential flip‑flops offering differential data, clock and output signals. They feature edge‑triggered asynchronous set and reset, a VBB output for single‑ended use, and operate over an extended VEE range of –4.2 V to –5.5 V.
The datasheet provides DC and AC electrical characteristics, including a toggle frequency of 1100‑1400 MHz, propagation delays, power‑supply currents, and VBB reference voltage. Pin configuration and mechanical dimensions for the 28‑pin PLCC package are also listed.
| Toggle Frequency | 1100‑1400 MHz |
|---|---|
| VEE Voltage Range | –4.2 V to –5.5 V |
| VBB Output Reference Voltage | ≈ –1.38 V to –1.25 V |
| Propagation Delay tPHL (Diff) | 450 ps – 750 ps |
The device can toggle at frequencies between 1100 MHz and 1400 MHz.
It operates with a VEE range from –4.2 V to –5.5 V.
The VBB output reference voltage is approximately –1.38 V to –1.25 V.
Both parts are available in a 28‑pin PLCC package.