This document introduces the features and characteristics of Virtex-E, including high density, high performance, low power consumption, high flexibility, high performance and sophisticated storage hierarchy.
The Virtex‑E 1.8 V FPGA family offers high‑density, high‑performance programmable logic with densities from 58 k to 4 M system gates and up to 130 MHz internal performance. It includes flexible SelectI/O+ technology, up to 804 single‑ended I/Os or 344 differential I/O pairs, and advanced clock management with eight DLLs.
The datasheet provides functional descriptions, electrical characteristics, pinout tables, and ordering information for all Virtex‑E devices, including package options, speed grades, and configuration methods such as SelectMAP, slave serial, and JTAG.
| Logic density | 58 k to 4 M system gates |
|---|---|
| Internal performance | 130 MHz |
| I/O count | Up to 804 single‑ended I/Os or 344 differential I/O pairs |
| DLL count | Eight |
| Core supply voltage (VCCINT) | 1.8 V |
The core supply voltage (VCCINT) is 1.8 V.
Virtex‑E devices contain eight DLLs.
Up to 804 single‑ended I/O pins are supported.
The family provides up to 130 MHz internal performance.