The MAX3681 deserializer is a high-performance device that is ideal for converting 622Mbps serial data to 4-bit-wide, 155Mbps parallel data in ATM and SDH/SONET applications. It operates from a single +3.3V supply and accepts PECL serial clock and data inputs. It delivers low-voltage differential-signal (LVDS) clock and data outputs for interfacing with high-speed digital circuitry. The device also provides an LVDS synchronization input that enables data realignment and reframing. The MAX3681 is available in the extended-industrial temperature range (-40°C to +85°C) and comes in a 24-pin SSOP package.
The MAX3681 converts 622 Mbps serial data to a 4‑bit‑wide, 155 Mbps parallel output for ATM and SDH/SONET applications. It operates from a single +3.3 V supply, accepts PECL clock and data inputs, and provides LVDS clock and data outputs. An LVDS synchronization input enables data realignment and reframing.
The device is offered in a 24‑pin SSOP package that meets an extended‑industrial temperature range of –40 °C to +85 °C. Detailed electrical characteristics, pin descriptions, and layout recommendations are provided for high‑speed circuit design. This manual is written in Chinese.
| Supply Voltage (VCC) | +3.0 V to +3.6 V |
|---|---|
| Operating Temperature Range | -40 °C to +85 °C |
It is supplied in a 24‑pin SSOP package.
The SYNC input is used for data realignment and reframing; pulsing it high for at least two SCLK cycles shifts the data alignment by one bit.