The MAX9325 low-skew, 2:8 differential driver features extremely low output-to-output skew (50ps max) and part-to-part skew (225ps max). These features make the device ideal for clock and data distribution across a backplane or board. The device selects one of the two differential HSTL or LVECL/LVPECL inputs and repeats them at eight differential outputs. Outputs are compati- ble with LVECL and LVPECL, and can directly drive 50Ω terminated transmission lines. The differential inputs can be configured to accept a single-ended signal when the unused complementary input is connected to the on-chip reference output volt- age VBB. All inputs have internal pulldown resistors to VEE. The internal pulldowns and a fail-safe circuit ensure differential low default outputs when the inputs are left open or at VEE. The MAX9325 operates over a 2.375V to 3.8V supply range for interfacing to differential HSTL and LVPECL signals. This allows high-performance clock or data dis- tribution in systems with a nominal +2.5V or +3.3V sup- ply. For LVECL operation, the device operates with a -2.375V to -3.8V supply. The MAX9325 is offered in 28-lead PLCC and space- saving 28-lead QFN packages. The MAX9325 is speci- fied for operation from -40°C to +85°C. Applications Precision Clock Distribution Low-Jitter Data Repeaters Features ♦ 50ps (max) Output-to-Output Skew ♦ 1.5psRMS (max) Random Jitter ♦ Guaranteed 300mV Differential Output at 700MHz ♦ +2.375V to +3.8V Supplies for Differ
The MAX9325 low‑skew, 2:8 differential driver selects one of two differential HSTL or LVECL/LVPECL inputs and repeats them at eight differential outputs. It is designed for precision clock and data distribution across backplanes or boards and can directly drive 50 Ω terminated transmission lines.
Key electrical features include 50 ps maximum output‑to‑output skew, 225 ps part‑to‑part skew, supply ranges of +2.375 V to +3.8 V (or –2.375 V to –3.8 V for LVECL), operation from –40 °C to +85 °C, and availability in 28‑lead PLCC and 28‑lead QFN packages.