Analog Devices AD9520-5 Clock Generator Datasheet

AD9520-5 is an AD company's clock generator product. It supports external 3.3V/5V VCO/VCXO to 2.4GHz, supports 1 differential or 2 single-ended reference inputs, supports CMOS, LVDS or LVPECL references to 250MHz, supports 16.67MHz to 33.3MHz crystal reference input, supports optional reference clock doubler, supports reference monitoring function, supports automatic and manual reference switching/holdover mode, supports selectable reverse/non-reverse switching, supports glitch-free reference switching, supports automatic recovery from holdover mode, supports digital or analog lock detection, supports optional zero delay operation, supports 12 1.6GHz LVPECL outputs, each output can be divided into 4 groups, each group of 3 outputs has a 1-to-32 divider with phase delay, output jitter is as low as 225fs rms, the channel-to-channel skew of grouped outputs is less than 16ps, each LVPECL output can be programmed as CMOS or LVPECL output.


Analog Devices AD9520-5 Clock Generator Datasheet - cover page
Brand
Analog Devices
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
80
File format
PDF
File size
1.4 MB
Published
03 May, 2012
Updated
01 October, 2023
MD5 checksum
ABA33E98B06FE7F51F9E3209F48199E5

About this manual

The AD9520-5 provides a multi‑output clock distribution function with sub‑picosecond jitter performance. It supports external VCO/VCXO up to 2.4 GHz, offers twelve LVPECL outputs (grouped in four sets) that can be reconfigured as CMOS outputs, and includes programmable dividers, zero‑delay operation and automatic reference switchover.

The device is controlled via an SPI‑ or I²C‑compatible serial port and stores configuration settings in an on‑package EEPROM. It operates from a single 3.3 V supply over the industrial temperature range (‑40 °C to +85 °C) and is supplied in a 64‑lead LFCSP package.

What's inside

  • Features
  • Applications
  • General Description
  • Functional Block Diagram
  • Specifications
  • Power Supply Requirements
  • PLL Characteristics
  • Clock Inputs
  • Clock Outputs
  • Timing Characteristics

Specifications

Number of LVPECL outputs12
Maximum output frequency2400 MHz
Supply voltage (VS)3.135 V – 3.465 V
Reference input frequency range0 – 250 MHz
Reference input sensitivity280 mV p‑p
Channel‑to‑channel skew (grouped outputs)<16 ps
Additive output jitter225 fs rms

Frequently asked questions

What supply voltage does the AD9520-5 require?

It operates from a 3.3 V supply, with the VS pin ranging from 3.135 V to 3.465 V.

How many LVPECL outputs are available on the AD9520-5?

The device provides twelve LVPECL outputs, arranged in four groups of three.

What is the maximum clock output frequency?

Each output can generate frequencies up to 2.4 GHz.

Which serial interfaces are supported for configuration?

The AD9520-5 can be programmed via SPI or I²C compatible serial ports.

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