Industrial

The BSS64 is a NPN general purpose amplifier produced by Fairchild Semiconductor Corporation. Its features are a maximum collector-emitter voltage of 80V, a maximum collector-base voltage of 120V, a maximum emitter-base voltage of 5.0V, a maximum collector current of 200mA, and a working temperature range of -55 to +150 degrees C.

This document describes the absolute maximum ratings and thermal characteristics of the NPN switching transistor BSV52. This device is designed for high-speed saturated switching at collector currents of 10mA to 100mA. It has a collector-emitter voltage of 12V, a collector-base voltage of 20V, and an emitter-base voltage of 5.0V. The maximum collector current is 200mA. The operating temperature range is -55 to +150°C.

This application note discusses pin-outs, land pattern and thermal performance for the single pad MicroFET.

Describes the package construction, thermal characterization challenges and some systemic examples utilizing heat sinks of Fairchild Semiconductor Dual CoolTM MOSFETs.

This document describes the assembly guidelines for the Fairchild Dual Power33 package, which uses Molded Leadless Packaging (MLP) technology and has low package height and excellent thermal performance.

This application note introduces the MicroFET 1.6x1.6 package technology, including MLP technology, package design, and assembly process

Fairchild’s GreenBridge™ solution reduces power losses in the bridge circuit and leads to an efficient and cost-effective PoE system.

This manual introduces the use of Power56 MOSFET, including mounting techniques and circuit design. The MOSFET has the characteristics of miniaturization, high performance and low power consumption.

This application note focuses on the soldering and back end processing of the Dual Power56

This document introduces an empirical self-heating SPICE MOSFET model which accurately portrays the vertical DMOS power MOSFET electrical and thermal responses.

This document presents an empirical self-heating SPICE MOSFET model that accurately portrays the vertical DMOS power MOSFET electrical and thermal responses. This macro-model implementation is the culmination of years of evolution in MOSFET modeling. This new version brings together the thermal and the electrical models of a VDMOS MOSFET. The existing electrical model [2,3] is highly accurate and is recognized in the industry. The sequence of the model calibration procedure using parametric data is described. Simulation response of the new self-heating MOSFET model track the dynamic thermal response and is independent of SPICE’s global tem- perature definition.

The Power MOSFET is a very popular switching device used in switching power supplies and DC-DC converters. Their operation frequency is being continuously increased to reduce size and increase power density. This causes high di/dt, intensifies the negative effect from parasitic inductances, and results in high voltage spike between the Power MOSFET drain and source during device turn off. The spike is worst at power on due to empty bulk capacitors and small inductance because the transformer primary side inductance almost reaches the level of leakage inductance. Fortunately, the Power MOSFET is equipped to withstand a certain level of stress, unnecessitating expensive protection circuits. This note presents an effective way to determine the applicability of a Power MOSFET in an application. The designers can balance between cost and reliability.

This application note provides information on how to select FETs for primary side switches in 48V power converters. Basic topologies of different 48V power converters are introduced and detailed guidelines for selecting FETs are provided.

This document provides an overview of how to design printed circuit boards (PCBs) for embedded switching power supplies. It covers the key rules and considerations to keep in mind when designing a PCB, as well as how to avoid some common mistakes.

This document introduces how to maximize the power handling capability of SOT-223 Power MOSFETs. This document provides the optimum design method of copper mounting pads to improve component performance and circuit board packing density.