Philips manuals, page 91
philips 74AHC2G32 74AHCT2G32 Dual 2-input OR gate handbook
The 74AHC2G/AHCT2G32 is a high-speed Si-gate CMOS device that provides two 2-input OR gates
PHILIPS PHP3N20L DATA SHEET
PHP3N20L is a N-channel enhancement mode logic level power field-effect transistor produced by Philips Semiconductors. The maximum drain-source voltage is 200 V, the rated drain current is 3.5 A, and the rated total power dissipation is 50 W. The typical switching time is 6 ns, and the package form is TO220AB.
PHILIPS PDIUSBH12 DATA SHEET
This document is a specification of PDIUSBH12 USB 2-port hub
PHILIPS 74ABT16899 74ABTH16899 18-bit latched transceiver with 16-bit parity generator/checker (3-State) handbook
Philips Semiconductors 74ABT/H16899 is a 16-bit to 16-bit parity transceiver with separate transparent latches for the A and B bus.
PHILIPS 74ABT16841A 74ABTH16841A 20-bit bus interface latch (3-State) handbook
This document describes the features and characteristics of the 74ABT16841A and 74ABTH16841A, which are 20-bit bus interface latches with 3-State outputs. They are ideal for applications requiring high speed, light loading, or increased fan-in with MOS microprocessors.
PHILIPS 74ABT16827A 74ABTH16827A 20-bit buffer/line driver non-inverting (3-State) handbook
This document describes the product specifications and features of the 74ABT16827A and 74ABTH16827A, two 20-bit buffers/line drivers. They feature non-inverting (3-State) outputs, multiple VCC and GND pins to minimize switching noise, live insertion/extraction capability, 3-State output buffers, power-up 3-State, bus-hold data inputs in 74ABTH16827A to eliminate the need for external pull-up resistors, output capability of +64mA/-32mA, latch-up protection exceeding 500mA, and ESD protection exceeding 2000V.
PHILIPS 74ABT16825A 74ABTH16825A 18-bit buffer/line driver; non-inverting (3-State) handbook
The74ABT16825A/74ABTH16825A is a 18-bit buffer/line driver produced by Philips Semiconductors company. It has low static and dynamic power consumption, high speed and high output drive capability. It can provide high performance bus interface buffering for wide data/address paths or buses carrying parity. They have NOR Output Enables (nOE1, nOE2) for maximum control flexibility. Two options are available, 74ABT16825A which does not have the bus-hold feature and 74ABTH16825A which incorporates the bus-hold feature.
PHILIPS 74ABT16823A 74ABTH16823A 18-bit bus interface D-type flip-flop with reset enable (3-State) handbook
74ABT16823A/74ABTH16823A is a 18-bit bus interface D-type flip-flop with reset and enable (3-State) produced by Philips Semiconductors
PHILIPS 74ABT16821A 74ABTH16821A 20-bit bus-interface D-type flip-flop; positive-edge trigger (3-State) handbook
74ABT16821A is a 20-bit bus-interface D-type flip-flop with positive-edge trigger (3-State) produced by Philips Semiconductors.
PHILIPS 74ABT16652 74ABTH16652 16-bit transceiver/register non-inverting (3-State) handbook
74ABT16652 is a 16-bit bidirectional transceiver/register with 3-state outputs manufactured by Philips Semiconductors. It has independent A and B bus registers, multiple VCC and GND pins, power-on 3-state, power-up reset, real-time and stored data multiplexing, etc.
PHILIPS 74ABT16646 74ABTH16646 16-bit bus transceiver/register (3-State) handbook
74ABT16646 is a 16-bit bus transceiver/register (3-State) product produced by Philips. It has independent A and B bus registers, multiple VCC and GND pins, minimized switching noise, live insertion/extraction permitted, power-up 3-State, power-up reset, multiplexed real-time and stored data, outputs sink 64mA and source 32mA, latch-up protection exceeds 500mA per JEDEC Std 17, 74ABTH16646 incorporates bus-hold data inputs which eliminate the need for external pull-up resistors to hold unused inputs, ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model, and other features.
PHILIPS 74ABT16543 74ABTH16543 16-bit latched transceivers with dual enable (3-State) handbook
The 74ABT16543 is a 16-bit dual enable (3-State) latched transceiver from Philips Semiconductors. It has two sets of D-type latches for temporary storage of data flowing in either direction. The device supports hot insertion/extraction, power-up 3-State, and power-up reset. Multiple VCC and GND pins minimize switching noise. Back-to-back registers are used for storage. Separate controls for data flow in each direction are provided. The 74ABTH16543 incorporates bus-hold data inputs that eliminate the need for external pull-up resistors to hold unused inputs.
PHILIPS 74ABT16541 74ABTH16541 16-bit buffer/line driver (3-State) handbook
The 74ABT16541 and 74ABTH16541 are 16-bit buffers/line drivers with 3-State functionality, produced by Philips Semiconductors. The product has low static and dynamic power consumption, high speed and high output drive. Its output can absorb 64mA current and output 32mA current. The product has two options, 74ABT16541 does not have the bus hold feature, and 74ABTH16541 has the bus hold feature.
PHILIPS 74ABT16501A 74ABTH16501A handbook
This data sheet provides the features of the 74ABT16501A/74ABTH16501A, which is an 18-bit bidirectional bus transceiver with 3-state buffers, output capability of +64mA/-32mA, TTL input and output switching levels, power-up reset, power-up 3-state, positive edge-triggered clock inputs and so on.
PHILIPS 74ABT16500C 74ABTH16500C 18-bit universal bus transceiver (3-State) handbook
The 74ABT16500C is a high-performance BiCMOS Device which combines low static and dynamic power dissipation with high speed and high output drive. This device is an 18-bit universal transceiver featuring non-inverting 3-State bus compatible outputs in both send and receive directions. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the transparent mode when the CPAB input is high and the CPBA input is low. In this mode, the 74ABT16500C drives the outputs of the A-side bus with the data received on the A-side inputs. For B-to-A data flow, the device operates in the latched mode when the CPBA input is high and the CPAB input is low. In this mode, the outputs of the B-side bus are latched by the data received on the B-side inputs.