Key facts
- Brand
- IDT
- Model
- IDT23S05
- Category
- Other Electronics
- Documents
- 2
- Languages
- EN
- Last added
- 2012-06-15
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IDT IDT23S05 3.3V Zero Delay Clock Buffer Datasheet
The IDT23S05 is an 8-pin high-speed phase-lock loop (PLL) clock buffer designed to address high-speed clock distribution applications. It accepts one reference input and drives five low skew clocks, operating within a frequency range of 10 to 133MHz. The device achieves zero delay by aligning the phase between the incoming clock and the output clock.
Read onlineIDT IDT23S05 specifications
| Supply Voltage | 3.3V |
|---|---|
| Output Skew | < 250ps |
| Jitter (Cycle-to-Cycle) | < 200 ps |
| Package Type | 8-pin SOIC |
All IDT IDT23S05 documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
What is the maximum operating frequency?
The device operates up to a maximum frequency of 133MHz.
Is external RC network required for operation?
No, the device does not require an external RC network as it has on-chip PLLs.
What is the operating frequency range of the IDT23S05E?
The device operates within a frequency range of 10 MHz to 200 MHz.
From: Integrated Device Technology IDT23S05E Zero Delay Clock Buffer Datasheet
Does the IDT23S05E support spread spectrum?
Yes, it is designed as a Spread Spectrum compatible clock buffer.
From: Integrated Device Technology IDT23S05E Zero Delay Clock Buffer Datasheet