IDT23S05E is a 3.3V zero delay clock buffer from IDT company. It is suitable for high-speed clock distribution applications. The device accepts one reference input and drives five low-skew clocks.
The IDT23S05E is a high-speed phase-lock loop (PLL) clock buffer designed to address high-speed clock distribution applications. It accepts one reference input on the REF pin and drives five low skew outputs (CLK1 through CLK4, plus an internal feedback output). The device achieves zero input-output delay by aligning the phase between the incoming clock and the output clocks within a frequency range of 10 MHz to 200 MHz.
| Supply Voltage Range | -0.5 to +4.6 V |
|---|---|
| Operating Frequency | 10MHz to 200MHz |
| Output Skew | < 250ps |
| Jitter (cycle-to-cycle) | < 200 ps |
| Power Down Current (Commercial) | < 12 µA |
| Operating Temp. (Commercial) | 0 to +70 °C |
| Operating Temp. (Industrial) | -40 to +85 °C |
The device operates within a frequency range of 10 MHz to 200 MHz.
Yes, it is designed as a Spread Spectrum compatible clock buffer.
It distributes one clock input to a bank of five outputs.