This manual introduces the overview, core board and carrier board interfaces, dimensions, etc. of the ZYNQ UltraScale+ FPGA development board AXU5EV-E
The Alinx AXU5EV-E is a ZYNQ UltraScale+ FPGA development board designed for MPSoCs development. It utilizes a core board plus carrier board architecture, featuring the Xilinx XCZU5EV-2SFVC784I chip which integrates a dual-core ARM Cortex-A53 processor and programmable logic. The core board includes 4GB of DDR4 SDRAM on the PS side, 1GB on the PL side, 8GB eMMC flash, and 256Mb QSPI flash.
| FPGA Chip | XCZU5EV-2SFVC784I |
|---|---|
| PS DDR4 Capacity | 4GB |
| PL DDR4 Capacity | 1GB |
| eMMC Capacity | 8GB |
| QSPI Flash Capacity | 256Mb |
| Power Input | DC12V |
| Core Board Size | 3.15*2.36 inch |
The system supports four startup modes: JTAG debug mode, QSPI FLASH, EMMC, and SD2.0 card startup mode.
The startup mode is configured using a 4-digit DIP switch (SW1) on the expansion board.
The reset KEY is connected to the reset chip input of the core board to reset the ZYNQ system.