Alinx AXU5EV-E Manuals

ManualLib has 3 documents for the Alinx AXU5EV-E (Other Electronics): 3 user manuals. Every file can be read online or downloaded as a PDF for free.

User Manual 3

Key facts

Brand
Alinx
Model
AXU5EV-E
Documents
3
Languages
EN
Last added
2026-09-30

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Alix AXU5EV-E ZYNQ UltraScale+ FPGA Development Board User Manual

Alix AXU5EV-E ZYNQ UltraScale+ FPGA Development Board User Manual

User Manual 57 pages · 2.2 MB · EN

This user manual covers the Alix AXU5EV-E FPGA development board, which uses Xilinx's Zynq UltraScale+ MPSoC XCZU5EV-2SFVC784I chip. The board features a core board with 4GB DDR4 (PS) and 1GB DDR4 (PL), 8GB eMMC, and 256Mb QSPI flash. The carrier board provides interfaces including M.2, DP, 4 USB 3.0, 2 Gigabit Ethernet, SD card, 40-pin expansion, CAN, RS485, and MIPI. It is designed for secondary development and supports high-speed data exchange, AI, and industrial control applications.

The manual details board structure, core board components, carrier board interfaces, power design, LEDs, keys, DIP switch configuration, and JTAG debug port. It includes pin assignments, clock configurations, and schematic diagrams for troubleshooting and development.

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Alinx AXU5EV-E specifications

FPGA ChipXilinx Zynq UltraScale+ MPSoC XCZU5EV‑2SFVC784I
PS DDR4 Memory Capacity4 GB (4 × 1 GB chips, 64‑bit bus)
PL DDR4 Memory Capacity1 GB (1 × 1 GB chip, 16‑bit bus)
Maximum DDR4 Speed (PS side)1200 MHz (data rate 2400 Mbps)
Maximum DDR4 Speed (PL side)1066 MHz (data rate 2132 Mbps)
QSPI Flash256 Mbit
eMMC Flash8 GB
Board Dimensions3.15 × 2.36 inches
Power Supply DomainsFour‑part division: Full, Low, PL, Battery

Source: Alinx AXU 5EV-E FPGA Development Board User Manual

All Alinx AXU5EV-E documents by type

User Manual 3

Day-to-day operation, settings and troubleshooting. Start here if the product is already set up.

Questions answered in these manuals

How much DDR4 memory is available on the processing system side?

The PS side has four 1 GB DDR4 chips, providing a total of 4 GB of memory.

From: Alinx AXU 5EV-E FPGA Development Board User Manual

What power‑supply sections does the board support?

The design supports a four‑part power division: Full, Low, PL and Battery domains.

From: Alinx AXU 5EV-E FPGA Development Board User Manual

What is the model number of the ZYNQ chip used in the AXU5EV-E board?

The model number is XCZU5EV-2SFVC784I.

From: Alix AXU5EV-E ZYNQ UltraScale+ FPGA Development Board User Manual

What is the power input voltage for the AXU5EV-E development board?

The power input voltage is DC12V.

From: Alix AXU5EV-E ZYNQ UltraScale+ FPGA Development Board User Manual

What are the startup modes supported by the AXU5EV-E?

The system supports four startup modes: JTAG debug mode, QSPI FLASH, EMMC, and SD2.0 card startup mode.

From: Alinx AXU5EV-E ZYNQ UltraScale+ FPGA Development Board User Manual

How is the startup mode configured?

The startup mode is configured using a 4-digit DIP switch (SW1) on the expansion board.

From: Alinx AXU5EV-E ZYNQ UltraScale+ FPGA Development Board User Manual