Pericom PI6C2404A-1 Zero-Delay Clock Buffer Datasheet

The PI6C2404A-1 is a PLL-based, zero-delay buffer, with the ability to distribute four outputs of up to 133 MHz at 3.3V. Two banks of two outputs exist, OUTA[1–2] and OUTB[1–2]. An external feedback pin is used to synchronize the outputs to the input; the relationship between loading of this signal and the other outputs determines the input-output delay. The PI6C2404A-1 is characterized for both commercial and industrial operation.


Pericom PI6C2404A-1 Zero-Delay Clock Buffer Datasheet - cover page
Brand
Pericom
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
7
File format
PDF
File size
56 KB
Published
07 August, 2012
Updated
30 September, 2023
MD5 checksum
E6CD208EF5FA5B24E98F142FF63893BA

About this manual

This document is a technical datasheet for the Pericom PI6C2404A-1 Zero-Delay Clock Buffer. The device is a PLL-based component designed to distribute four outputs of up to 133 MHz at 3.3V with low cycle-to-cycle jitter and input-to-output delay less than 200ps.

What's inside

  • Features
  • Pin Configuration
  • Maximum Ratings
  • Operating Conditions
  • DC Electrical Characteristics
  • AC Electrical Characteristics
  • Switching Waveforms
  • Packaging Mechanical

Specifications

Maximum rated frequency133 MHz
Supply Voltage3.0V to 3.6V
Operating Temperature (Commercial)0°C to +70°C
Operating Temperature (Industrial)-40°C to +85°C
Output Frequency10 MHz to 133 MHz
Package Type8-pin, 150-mil SOIC (W)

Frequently asked questions

What is the maximum rated frequency of this buffer?

The PI6C2404A-1 has a maximum rated frequency of 133 MHz.

What is the input-to-output delay?

The input to output delay is less than 200ps.

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