TEXAS INSTRUMENTS CDC924 133-MHz CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS WITH 3-STATE OUTPUTS handbook

The CDC924 is a clock synthesizer/driver for PC motherboards that supports Pentium III class motherboards. It uses a 14.318 MHz crystal input to generate multiple output frequencies. The CDC924 includes spread spectrum clocking (SSC) with 0.5% downspread for reduced electromagnetic interference (EMI) performance. It also features power management control terminals, low output skew and jitter for clock distribution, and supports 2.5 V and 3.3 V supplies. The CDC924 generates various clocks including CPU, PCI, APIC, and REF clock signals.


TEXAS INSTRUMENTS CDC924 133-MHz CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS WITH 3-STATE OUTPUTS handbook - cover page
Brand
Texas Instruments
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
18
File format
PDF
File size
251 KB
Published
01 August, 2012
Updated
29 September, 2023
Model
133-MHZ
MD5 checksum
8593F4CEC0BB753EA5C7B0F1206BF0E4

About this manual

The CDC924 is a clock synthesizer and driver designed to support Intel Pentium III class motherboards. It uses a 14.318-MHz crystal input to generate various system clocks, including CPU, PCI, APIC, and reference signals. The device incorporates two phase-locked loops (PLLs) and on-chip loop filters to eliminate the need for external components.

What's inside

  • Description
  • Terminal Functions
  • Absolute Maximum Ratings
  • Recommended Operating Conditions
  • Spread Spectrum Clocking
  • Functional Block Diagram

Specifications

Supply Voltage VDD (3.3V)3.135 – 3.465 V
Supply Voltage VDD (2.5V)2.375 – 2.625 V
Crystal Frequency f(XTAL)14.318 MHz
Operating Temperature Range-0 °C to 85°C
Package Type56-Pin SSOP Package

Frequently asked questions

What is the input frequency for the CDC924?

The device uses a 14.318-MHz crystal input to generate multiple output frequencies.

Does the CDC924 require external loop filter components?

No, on-chip loop filters and internal feedback loops eliminate the need for external components.

What happens when a low-level input is applied to PWR_DWN?

The device powers down completely, with all outputs forced into a low-level output state.

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