The MC10E/100E241 is an 8-bit shiftable register. Unlike a standard universal shift register such as the E141, the E241 features internal data feedback organized so that the SHIFT control overrides the HOLD/LOAD control. This enables the normal operations of HOLD and LOAD to be toggled with a single control line without the need for external gating. It also enables switching to scan mode with the single SHIFT control line. The eight inputs D0-D7 accept parallel input data, while S-IN accepts serial input data when in shift mode. Data is accepted a setup time before the positive-going edge of CLK; shifting is also accomplished on the positive clock edge. A HIGH on the Master Reset pin (MR) asynchronously resets all the registers to zero.
This document is a technical datasheet for the Motorola MC10E241 and MC100E241, which are 8-bit shiftable registers. Unlike standard universal shift registers, these devices feature internal data feedback where the SHIFT control overrides the HOLD/LOAD control, allowing operations to be toggled with a single line. The device accepts parallel data on inputs D0 through D7 and serial data on S-IN, with data accepted on the positive-going edge of the CLK signal. An asynchronous Master Reset (MR) pin resets all registers to zero.
| Max. CLK to Q | 1000ps |
|---|---|
| Max. Shift Frequency | 900 MHz |
| Package Type | 28-Lead PLCC |
| Operating Voltage Range | -4.2V to -5.46V |
| Input Pulldown Resistors | 75kQ |
The SHIFT control overrides the HOLD/LOAD control, enabling normal operations to be toggled with a single control line.
A HIGH on the Master Reset pin asynchronously resets all the registers to zero.
The maximum shift frequency is 900 MHz.