The MC10E/100E212 is a scannable registered ECL driver typically used as a fan-out memory address driver for ECL cache driving. In a VLSI array based CPU design, use of the E212 allows the user to conserve array output cell functionality and also output pins. The input shift register is designed with control logic which greatly facilitates its use in boundary scan applications.
The document describes the MC10E/100E212, a scannable registered ECL driver designed primarily as a fan-out memory address driver for ECL cache driving in VLSI array-based CPU designs. It features an input shift register with control logic to facilitate boundary scan applications.
| Max CLK to Output Delay | 1025 ps |
|---|---|
| Supply Voltage Range (Extended) | -4.2V to -5.46V |
| Input Pulldown Resistance | 75kQ |
It is typically used as a fan-out memory address driver for ECL cache driving.
Yes, it is designed with control logic that greatly facilitates its use in boundary scan applications.