This document is MC10E/100E155 datasheet, introduces the function and characteristics of the chip, including pin definition, logic diagram, truth table, characteristic parameters, etc.
This document is a technical datasheet for the Motorola MC10E155 and MC100E155 integrated circuits. These devices contain six 2:1 multiplexers followed by transparent latches with single-ended outputs. Key features include asynchronous master reset, dual latch enables, and an extended voltage range for the 100E series.
| Number of Multiplexers | Six |
|---|---|
| Max LEN to Output MUX-LATCH | 850ps |
| Max D to Output | 825ps |
| Input Pulldown Resistors | 75kQ |
| VEE Range (100E Series) | -4.2V to -5.46V |
| Package Type | 28-Lead PLCC |
When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent, and output data is controlled by the multiplexer select control, SEL.
The Master Reset (MR) overrides all other controls to set the Q outputs LOW.