MC10E/100E150 is a 6-bit D latch with differential outputs produced by Motorola. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent and input data transitions propagate through to the output. A logic HIGH on either LEN1 or LEN2 (or both) latches the data. The Master Reset (MR) overrides all other controls to set the Q outputs low.
This document is a technical datasheet for the Motorola MC10E150 and MC100E150, which are 6-Bit D Latches featuring differential outputs. The device includes six D-type latches controlled by Latch Enables (LEN1, LEN2) and a Master Reset (MR). It is available in a 28-Lead PLCC package (FN Suffix, Case 776-02).
| Propagation Delay (Max) | 800 ps |
|---|---|
| Supply Voltage Range (100E) | -4.2V to -5.46V |
| Input Pulldown Resistors | 75kΩ |
| Package Type | 28-Lead PLCC |
| Package Case Number | 776-02 |
The Master Reset overrides all other controls to set the Q outputs low.
The latch is transparent when both Latch Enables (LEN1, LEN2) are LOW.